Memory Unit

isa_manim.isa_object.mem_unit.MemUnit presents one memory unit in ISA.

As shown in the above figure, such an object contains the following Manim objects:

mem_rect presents the memory unit. The size of mem_rect is fixed as 4.0 x 3.0.
name_text presents the name of the memory unit, which is centrally aligned with mem_rect.
addr_rect presents the address port of the memory unit. The width of addr_rect presents the bit width of the address port.
data_rect presents the data port of the memory unit. The width of data_rect presents the bit width of the data port.
data_rect2 presents the second data port of the memory unit if the memory unit has dual ports. The width of data_rect presents the bit width of the data port. data_rect2 shares the same width as data_rect.
mem_map_list presents a list of rectangles for memory maps. Each rectangle presents a range in memory. The read/write operation on memory will add memory marks within the range of the rectangle that covers the accessed locations.
- The width of one rectangle of the memory map should cover mem_rect, addr_rect, and data_rect.
- The height of one rectangle of the memory map is 1.0.
mem_map_text presents a list of texts that mark each rectangle's lowest and highest address for the memory map.
- Texts in mem_map_text are aligned with the left or right boundary of the rectangle for the memory map and below the rectangle for the memory map.

If there is only one rectangle for the memory map, the height of the entire memory unit is 6.0 because the rectangle and the texts of the memory map cost 1.0 in height individually.

As the green dot shown in the above figure, the orign point of one memory unit is located in the center position of mem_rect, which is different from the geometry center position of this object. It is suggested to use function shift rather than function move_to to change the location of the register.

get_addr_pos and get_data_pos return the position within the address and data port. The width of elements may not cover the entire address and data port. For example, read one byte through a data bus of eight bytes. The option width provides the actual element width. It is assumed that elements are always placed at the lowest side.

In some instructions, memory operations return status to present whether options succeed or not. One status_rect is added within mem_rect to present the status port if a non-zero value is provided to the option status_width in the constructor function. get_status_pos returns the position within the status port.

Source code: test_mem_unit_status.py

The read/write-memory animation switch affects whether accessed locations match any memory map. Function is_mem_range_cover returns True if the accessed memory location has the matched memory map.

Moreover, animations will generate address marks and memory marks to show the accessed location on memory maps. get_addr_mark returns one address mark at a specified address. get_rd_mem_mark and get_wr_mem_mark return memory marks covering the specified memory range.

Address marks are cleared from the Manim scene before the end of one animation to read/write memory. However, memory marks will stay in the Manim scene until the end of one animation section. Hence, the memory marks are collected in mem_mark_list. append_mem_mark_list appends one memory mark to mem_mark_list; get_mem_mark_list returns mem_mark_list.

MemUnit

Bases: VGroup

Object for memory unit.

Attributes:

Name	Type	Description
`mem_rect`	`RoundedRectangle`	Round rectangle of memory unit.
`name_text`	`Text`	Name of memory unit.
`addr_rect`	`Rectangle`	Rectangle of address operand.
`data_rect`	`Rectangle`	Rectangle of data operand.
`mem_map_list`	`List[Rectangle]`	List of rectangles of memory map ranges.
`mem_map_text`	`List[Tuple[Text, Text]]`	List of text of memory map ranges. Each item in the list is a pair of loweset and highest address.
`mem_mark_list`	`List[Rectangle]`	List of memory marks.
`mem_map_left_brace`	`CubicBezier`	Left brace of memory map.
`mem_map_right_brace`	`CubicBezier`	Right brace of memory map.
`mem_color`	`Color`	Color of memory unit.
`mem_addr_width`	`int`	Bit width of address operand.
`mem_data_width`	`int`	Bit width of data operand.
`mem_addr_align`	`int`	Align requirement of address.
`mem_font_size`	`int`	Font size of name text.
`mem_value_format`	`int`	Format string for data values. Inherented by element units.
`mem_range`	`List[Tuple[int, int]]`	List of memory range.
`mem_map_width`	`int`	Width of memory map rectangle.

`init(color, addr_width, data_width, addr_align, mem_range, font_size, value_format, para_enable, status_width, mem_map_width, dual_port)`

Constructor an function call.

Parameters:

Name	Type	Description	Default
`color`	`Color`	Color of memory unit.	required
`addr_width`	`int`	Width of address, in bit	required
`data_width`	`int`	Width of data, in bit	required
`addr_align`	`int`	Alignment of memory range address.	required
`mem_range`	`List[Tuple[int, int]]`	List of memory range, each item is a pair of lowest address and highest address.	required
`font_size`	`int`	Font size of memory name.	required
`value_format`	`str`	Format string for result values. Inherented by element units.	required
`para_enable`	`bool`	Whether the animation related to this memory unit can perform parallel or not.	required
`mem_map_width`	`int`	Hint for width of memory map width.	required
`dual_port`	`bool`	Memory unit has two data port.	required

`repr()`

Return a string for debugging.

Returns:

Type	Description
`str`	A string for debugging.

`str()`

Return a string for debugging.

Returns:

Type	Description
`str`	A string for debugging.

`append_mem_mark_list(mark)`

Append one mark to memory mark list.

Parameters:

Name	Type	Description	Default
`mark`	`Rectangle`	Memory mark to append.	required

`get_addr_mark(addr, color)`

Create an triangle to point the specified address in memory map rectangle.

Parameters:

Name	Type	Description	Default
`addr`	`int`	The specified address.	required
`color`	`Color`	Color of address mark.	required

Returns:

Type	Description
`Triangle`	Triangle object of address mark.

`get_addr_pos(width)`

Return center position of address port.

Parameters:

Name	Type	Description	Default
`width`	`int`	Bit width of address.	required

`get_data2_pos(width)`

Return center position of data port.

Parameters:

Name	Type	Description	Default
`width`	`int`	Bit width of data.	required

`get_data_pos(width)`

Return center position of data port.

Parameters:

Name	Type	Description	Default
`width`	`int`	Bit width of data.	required

`get_mem_mark_list()`

Return the list of memory marks.

Returns:

Type	Description
`List[Rectangle]`	The list of memory marks.

`get_placement_height()`

Return the height of this object for placement. The height is ceil to an integer.

Returns:

Type	Description
`int`	The height of this object.

`get_placement_mark()`

Return the marker of this object for placement, which is 4.

Returns:

Type	Description
`int`	Marker of this object.

`get_placement_width()`

Return the width of this object for placement. The width is ceil to an integer.

Returns:

Type	Description
`int`	The width of this object.

`get_rd_mem_mark(laddr, raddr, color)`

Create one rectangle to cover the memory range specified by [laddr, raddr) in memory map rectangle.

The height of the memory mark is 0.34 (1/3 of the height of memory map rectangle).

Parameters:

Name	Type	Description	Default
`laddr`	`int`	Minimum address of memory range.	required
`raddr`	`int`	Maximum address of memory range.	required
`color`	`Color`	Color of address mark.	required

Returns:

Type	Description
`Rectangle`	Rectangle object of memory mark.

`get_status_pos(width)`

Return center position of status port.

Parameters:

Name	Type	Description	Default
`width`	`int`	Bit width of status.	required

`get_wt_mem_mark(laddr, raddr, color)`

Create one rectangle to cover the memory range specified by [laddr, raddr) in memory map rectangle.

The height of the memory mark is 0.66 (2/3 of the height of memory map rectangle).

Parameters:

Name	Type	Description	Default
`laddr`	`int`	Minimum address of memory range.	required
`raddr`	`int`	Maximum address of memory range.	required
`color`	`Color`	Color of address mark.	required

Returns:

Type	Description
`Rectangle`	Rectangle object of memory mark.

`has_status_port()`

Return whether the memory unit has status port.

Returns:

Type	Description
`bool`	Return true if the memory unit has status port

`is_mem_range_cover(addr)`

Check whether given address is covered in memory map ranges.

Parameters:

Name	Type	Description	Default
`addr`	`int`	Address to check.	required

Returns:

Type	Description
`bool`	If the specified address is covered in memory map ranges, return True. Otherwise, return False.

`set_placement_corner(row, col)`

Set the position of object by the left-up corner position. Move object to the specified position.

Parameters:

Name	Type	Description	Default
`row`	`int`	Vertical ordinate of left-up corner.	required
`col`	`int`	Horizontal ordinate of left-up corner.	required

Memory Unit

MemUnit

__init__(color, addr_width, data_width, addr_align, mem_range, font_size, value_format, para_enable, status_width, mem_map_width, dual_port)

__repr__()

__str__()

append_mem_mark_list(mark)

get_addr_mark(addr, color)

get_addr_pos(width)

get_data2_pos(width)

get_data_pos(width)

get_mem_mark_list()

get_placement_height()

get_placement_mark()

get_placement_width()

get_rd_mem_mark(laddr, raddr, color)

get_status_pos(width)

get_wt_mem_mark(laddr, raddr, color)

has_status_port()

is_mem_range_cover(addr)

set_placement_corner(row, col)

`init(color, addr_width, data_width, addr_align, mem_range, font_size, value_format, para_enable, status_width, mem_map_width, dual_port)`

`repr()`

`str()`

`append_mem_mark_list(mark)`

`get_addr_mark(addr, color)`

`get_addr_pos(width)`

`get_data2_pos(width)`

`get_data_pos(width)`

`get_mem_mark_list()`

`get_placement_height()`

`get_placement_mark()`

`get_placement_width()`

`get_rd_mem_mark(laddr, raddr, color)`

`get_status_pos(width)`

`get_wt_mem_mark(laddr, raddr, color)`

`has_status_port()`

`is_mem_range_cover(addr)`

`set_placement_corner(row, col)`